Some conventional microwave amplifiers of the above-described type employ a GaAs FET as a microwave amplifying device thereof. Some of such GaAs FET's have an input reflection S parameter S11 and an output reflection S parameter S22 which are both capacitive. When an amplifier is a common-source amplifier, in order to adjust input and output impedances of such an FET to a predetermined value, e.g. 50 .OMEGA., an inductor may have to be formed in series with the gate of the FET or a long strip line may have to be connected to the gate, and, similarly, in the output side, too, an inductor should be formed in series with the drain, or a long strip line should be connected to the drain. This causes the imaginary parts of the input and output reflection S parameters S11 and S22 to be zero.
FIG. 1 shows an example in which inductors are connected in series with a gate and a drain of a FET. A microwave amplifier shown in FIG. 1 includes a GaAs FET 10, an input-side matching circuit 12, and an output-side matching circuit 14. Input-side and output-side matching circuits 12 and 14 are disposed on dielectric substrates 16 and 18, respectively. A metallic pattern 20 for connection is disposed on substrate 16 at a location close to FET 10. The gate of FET 10 is connected to metallic pattern 20 via bonding wires 22. Similarly, a metallic pattern 24 for connection is disposed on dielectric substrate 18 at a location close to FET 10. The drain of FET 10 is connected by bonding wires 26 to metallic pattern 24.
FET 10 and dielectric substrates 16 and 18 are housed in a metallic casing (not shown), with the source of FET 10 connected to the metallic casing.
A plurality of bonding wires 28 connect metallic pattern 20 and input-side matching circuit 12, and, similarly, a plurality of bonding wires 30 connect metallic pattern 24 to output-side matching circuit 14. Bonding wires 28 function as an inductor L shown in an equivalent circuit of FIG. 2(b). Bonding wires 30 also function as inductor L. Thus, in this configuration, an inductor is connected in series with the gate and with the drain.
FIG. 3 shows a microwave amplifier which includes bonding wires as inductors as in the case of FIGS. 1 and 2, and which also includes four GaAs FET's 32 having a total gate width of 18.9 mm and a unit gate width of 150 .mu.m. FIG. 3 shows input-side matching circuits and FET's 32 and their vicinity in an equivalent circuit which has resulted from simulating the microwave amplifier in which a signal in a range of from 2.6 GHz to 3.7 GHz is applied to four FET's 32 through a distributor (not shown) and respective input-side matching circuits for amplification, and amplified outputs from respective FET's 32 are derived through respective output-side matching circuits (not shown) and combined with each other in a combinet (not shown). The simulation has been made to minimize input and output return loss.
Input reflection S parameter S11 of each FET 32 is -0.312 dB and at -175.6.degree., therefore, is capacitive at the center frequency of 3.2 GHz. In order to translate this S parameter S11 to an S parameter (-0.312 dB, 180.degree.) having only a real part by disposing an inductor in series with the gate of FET 32, the inductor must have a value of about 0.2 nH. In the conventional circuit shown in FIG. 3, this value is provided by an inductor 34 of 0.1 nH and an inductor 36 of 0.095 nH.
After that, impedance conversion is provided by a 1/4 wavelength distributed constant line 42 to provide matching with 50 .OMEGA.. Although not shown, similar inductors are used in the output-side matching circuits to thereby cancel the imaginary part of the parameter S22 of FET 32, and, then, a 1/4 wavelength distributed constant line is used for impedance conversion to 50 .OMEGA..
FIG. 4 is an implementation of pact of the equivalent circuit shown in FIG. 3. The circuit is disposed on a dielectric substrate 38 having a relative dielectric constant of 91 and having a thickness of 0.15 mm. A pattern 40 to be connected to the gate of an FET 32, a 1/4 wavelength distributed constant line (input-side matching circuit) 42, a pattern 44 for connecting pattern 40 to line 42 are also disposed on dielectric substrate 38.
The gate of FET 32 and pattern 40 are interconnected by bonding wires 46. Patterns 40 and 44 are interconnected by bonding wires 34a which are arranged to provide a total inductance of 0.1 nH. Pattern 44 and input-side matching circuit 42 are interconnected by bonding wires 36a which are arranged to provide a total inductance of 0.095 nH.
When there are differences in the characteristics of FETs 32, the imaginary part of parameter S11 cannot be cancelled by inductors of 0.1 nH and 0.095 nH, the numbers of bonding wires 34a and 36a may be changed to adjust the inductance to desired inductance. In the example shown in FIG. 4, the length of dielectric substrate 38, l, is about 3 mm.
The arrangement shown in FIG. 4 employs a number of bonding wires. It is troublesome to bond these wires to necessary parts of the circuit. This reduces manufacturing efficiency. Furthermore, for connecting bonding wires 34a and 36a, spacing must be disposed between connecting patterns 40 and 44 and between pattern 44 and matching circuit 42, which undesirably necessitates the use of a relatively large dielectric substrate.
In addition, in the arrangement of FIG. 4, when inductors of 0.1 nH and 0.095 nH cannot move S11 onto the real part axis of Smith chart due to variation in the performance of FETs 32, the inductance is adjusted by changing the number of bonding wires changing the number of bonding wires results in stepwise change of inductance so that only rough adjustment can be made.